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PI90LVB010
Single Bus LVDS Transceiver
Features
* * * * * * * * Bus LVDS Signaling (BLVDS) Designed for Double Termination Applications Balanced Output Impedance Light Bus Loading: 5pF typical Glitch-free power up/down (Driver Disabled) Operates from a 3.3V supply High Signaling Rate Capability: >100Mbps Driver: - 250mV Differential Swing into a 27 load - Propagation Delay of 1.5ns typ. - Low Voltage TTL (LVTTL) Inputs are 5V Tolerant - Driver is High Impedance when disabled or VCC <1.5V Receiver: - Accepts 50mV (min.) Differential Swing with up to 2.0V ground potential difference - Propagation Delay of 3.3ns typical - Low Voltage TTL (LVTTL) Outputs - Open, Short, and Terminated Fail Safe Bus terminal ESD exceeds 10kV Industrial Temperature Operation (-40C to +85C) Packaging (Pb-free & Green available): - 8-lead SOIC (W) - 8-lead MSOP (U)
Description
The PI90LVB010 is a differential line driver and receiver (transceiver) that is similar to the IEEE1596.3 SCI and ANSI/TIA/EIA644LVDS standards, the difference is that the driver output current is higher. This modification enables true half-duplex operation with more than one LVDS driver or with two line transmission resistors over a 50 differential transmission line. To minimize bus loading, the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility resulting from four separate lines that are provided: DIN, DE, RE, and ROUT. This device also feature flow-through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high-speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of 1V.
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* * *
Block Diagram
D0+/RI+ DIN D0-/RI- DE RE
Pin Configuration
DE DIN ROUT GND
1 2 3 4
8 7 6 5
VCC DO+/RI+ DO-/RI- RE
ROUT
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PS8662A
09/03/04
PI90LVB010 Single Bus LVDS Transceiver Absolute Maximum Ratings(1,2)
Supply Voltage (VCC) ...........................................................6.0V Enable Input Voltage (DE, RE)..................-0.3V to (VCC +0.3V) Driver Input Voltage (DIN)........................-0.3V to (VCC +0.3V) Receiver Output Voltage (ROUT) ...............-0.3V to (VCC +0.3V) Bus Pin Voltage (DO/RI) ................................... -0.3V to +3.9V Driver Short Circuit .................................................... Continuous ESD (HBM 1.5k, 100pF)................................................ >10kV Maximum Package Power Dissipation at 20C SOIC ............................................................................1025mW Derate SOIC Package ............................................... 8.2mW/C Storage Temperature Range ...............................-65C to +150C Lead Temperature Range (Soldering, 4s) ......................... +260C
Recommended Operating Conditions
Supply Voltage (VCC) Receiver Input Voltage Operating Free-Air Temperature Min. 3.0 0.0 -40
Max. 3.6 2.9 +85
Units V V C
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Functional Mode
Mode Select Driver Mode Receiver Mode 3-State Mode Loop Back Mode DE H L L H RE H L H L
Transmitter Mode
Inputs DE H H H L H DI L H 2 > & > 0.8 X Open DO+ L H X Z L Outputs DOH L X Z H
Receiver Mode
RE L L L H Inputs (RE+) - (RI-) L (< -100mV) H (> + 100mV) 100mV > & >-100mV X Outputs ROUT L H ? Z
Pin Description
Pin Name DIN DO RI ROUT RE DE GND VCC Pin# 2 6, 7 3 5 1 4 8 Inputs/ Description Outputs I TTL Driver Input LVDS Driver Outputs/ I/O LVDS Receiver Inputs O TTL Receiver Outputs Receiver Enable TTL Input I (Active Low) Driver Enable TTL Input I (Active High) NA Ground NA Power Supply
Notes: 1. H = High, L = Low, Z = High Impedance, X = High or Low
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PS8662A
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PI90LVB010 Single Bus LVDS Transceiver DC Electrical Characteristics(2,3) (TA = -40C to +85C, unless otherwise noted. VCC = 3.3V 0.3V)
Symbol VOD VOD VOS VOS IOSD Parameter Output Differential Voltage VOD Magnitude Change Offset Voltage Offset Magnitude Change Output Short Circuit Current VO = 0V, DE = VCC VID = +100mV Inputs Open VOH Voltage Output High Inputs Shorted Inputs Terminated, RL = 27 VOL IOS VTH VTL IIN VIH VIL IIH IIL VCL ICCD ICCR ICCZ ICC COUTPUT Bus Pin Capacitance Power Supply Current Voltage Output Low Output Short Circuit Curretn Input Threshold High Input Threshold Low Input Current Minimum Input High Voltage Minimum Input Low Voltage Input High Current Input Low Current Input Diode Clamp Voltage VIN = VCC or 2.4V VIN = GND or 0.4V ICLAMP = -18mA DE = RE = VCC, RL = 27 DE = RE = 0V DE = 0V, RE = VCC DE = VCC, RE - 0V, RL = 27 DO+/RI+ DO-/RIVCC -1.5 DE = 0V, VIN = 2.4V or 0V VCC = 0V, VIN = 2.4V or 0V IN, DE, RE IOL = 2.0mA, VID = -100mV VOUT = 0V, VID = 100V DE = 0V DO+/RI+ DO-/RI-100 -20 -20 2.0 GND 1 1 -0.8 13 5 3 16 5 20 8 7.5 22 pF mA 1 1 20 20 VCC 0.8 10 10 -5 IOH = -400 ROUT 2.8 2.8 2.8 2.8 RL = 27, See figure 1 DO+/RI+ DO-/RITest Condition Pin Min. 140 1 Typ. 250 3 1.25 5 -12 3 3 3 3 0.1 -35 0.4 -85 100 mA mV A V A V V Max. 360 30 1.65 50 -20 Units mV V mV mA
Notes: 1. "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. 2. All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground except: VOD, VID, VTH, and VTL, unless otherwise specified. 3. All typicals are given for VCC = +3.3V or 5.0V and TA = +25C unless otherwise stated. 4. ESD Rating: HBM (15k, 100pF) > 2.0kV EAT (0, 200pF) >300V. 5. CL includes probe and jig capacitance. 6. Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50, tr, tf 6.0ns (0% - 100%) on control pins and 1.0ns for RI inputs. 7. The PI90LVB010 is a current mode device and only functions with datasheet specification when a resistive load is appplied between the driver outputs. 8. For receiver disable delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH and tPHZ.
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PS8662A
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PI90LVB010 Single Bus LVDS Transceiver AC Electrical Characteristics (TA = -40C to +85C, VCC = 3.3V 0.3V)
Symbol Paramter Test Conditions Min. Typ. Max. Units
Differential Driver Timing Requirement tPHLD tPLHD tSKD tTLH tTHL tPHZ tPLZ tPZH tPZL Differenital Propagation Delay High to Low Differential Propagation Delay Low to High Differential Skew | tPHLD - tPLHD | Transition Time Low to High Transition Time High to Low Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low RL = 27 Figures 4 & 5 CL = 10pF 0.5 0.5 0.5 0.5 RL = 27 Figures 2 & 3 CL = 10pF 0.7 0.7 1.5 1.5 0.2 0.3 0.3 2.6 2.6 2.6 2.6 2.7 2.7 1.0 0.9 0.9 3.3 3.3 3.3 3.3 ns
Differential Receicer Timing Requirements tPHLD tPLHD tSKD tR tF tPHZ tPLZ tPZH tPZL Differential Propagation Delay High to Low Differenital Propagation Delay Low to High Differential Skew | tPHLD - tPLHD | Rise Time Fall Time Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low RL = 500 Figures 8 & 9 CL = 10pF(8) 1.5 5.0 0.5 0.5 Figures 6 & 7 CL = 10pF 1.3 1.3 2.1 2.1 0.5 0.8 1.8 4.0 4.0 2.5 2.5 3.2 3.2 2.0 1.4 1.4 6.0 7.0 7.0 6.0 ns
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PS8662A
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PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms
DO+ RL/2 = 13.5 or 50
VOS VOD
2V 0.8V S1
DIN
RL/2 = 13.5 or 50 Driver Enabled DO-
Figure 1. Differential Driver DC Test Circuit
CL DO+ RL CL Driver Enabled DO-
Pulse Generator 50
DIN
Figure 2. Differential Driver Propagation Delay and Transition Time Test Circuit
3V DIN 0V DOUT+,DOUT1.5V tPHLD 0V 0V (Differential) 0V DO- 80% (DO+) - (DO-) 0V 20% tTLH tDIFF = (DO+) - (DO-) 80% 0V 20% tTHL 1.5V tPLHD
DO+
Figure 3. Driver Propagation Delay and Transition Time Waveforms
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PS8662A 09/03/04
PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued)
DO+ 2.0 0.8 RL/2 Pulse Generator DE 50 CL DIN RL/2
+1.2V
DO- CL
Figure 4. Driver Three-State Delay Test Circuit
3V
DE
0V
1.5V tPHZ
1.5V
tPZH 50% 50% 1.2V
DO - (DI=L) VOH DO + (DI=H)
tPLZ
DO - (DI=H) DO + (DI=L)
VOH VOL 50%
tPZL
1.2V
50%
Figure 5. Driver Three-State Delay Waveforms
RI+
Pulse Generator
RI-
+ - CL
RO
50
50
Figure 6. Receiver Propagation Delay and Transistion Time Test Circuit
RI+ 0V (Differential) RI- tPLH 1.5V VO 20% tTLH tTHL 80% VID = 200mV (1.2V CM) +1.1V tPHL 80% 1.5V 20%
+1.3V
Figure 7. Receiver Propagation Delay and Transistion Time Waveforms
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PS8662A 09/03/04
PI90LVB010 Single Bus LVDS Transceiver Test Circuits and Timing Waveforms (continued)
RI+ RI- Pulse Generator + R - RE CL RL VCC
50
Figure 8. Receiver Three-State Delay Test Circuit
RE 3V 0V 1.5V tPHZ VOH ROUT VOH VOL VOH -0.5 tPLZ VOL +0.5 tPZL 50% 1.5V tPZH 50%
VOH GND VCC VOL
Figure 9. Receiver Three-State Delay Waveforms
Typical Bus Application Configurations
DO+ DIN DO- DE RE ROUT + - RI+ RI- RI+ RI- + - 54 54 DO- DE RE ROUT DO+ DIN
Figure 10. Bidirectional Half-Duplex Point-to-Point Applications
DIN /ROUT 54 DIN /ROUT
DIN /ROUT
DIN /ROUT
DIN /ROUT 54
DIN /ROUT
DIN /ROUT
Figure 11. Multipoint Bus Applications
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PS8662A 09/03/04
PI90LVB010 Single Bus LVDS Transceiver Packaging Mechanical: 8-Pin SOIC (W)
8
.149 .157
3.78 3.99
.0099 .0196
0.25 x 45 0.50
1
.189 .196
0-8
.0075 .0098
0.40 .016 1.27 .050
0.19 0.25
4.80 5.00
.053 .068
.016 .026 0.406 0.660
REF
1.35 1.75
SEATING PLANE
.2284 .2440 5.80 6.20
.050 BSC 1.27
.0040 0.10 .0098 0.25
.013 0.330 .020 0.508
X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
Packaging Mechanical: 8-Pin MSOP (U)
15 Max.
.003 .012 0.07 0.30
Gauge Plane .010 0.25
.016 .028 0.40 0.70
.003 .012 0.07 0.30
15 Max.
.037 0.95 REF
0- 6
Detail A
.112 2.85 .120 3.05
Detail A
15 MAX
.114 2.90 .122 3.10
15 MAX
.114 2.90 .122 3.10
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PS8662A
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PI90LVB010 Single Bus LVDS Transceiver Ordering Information
Ordering Code PI90LVB010W PI90LVB010WE PI90LVB010U PI90LVB010UE Package Code W W U U 8-pin, SOIC Pb-free & Green, 8-pin, SOIC 8-pin MSOP Pb-free & Green, 8-pin MSOP Package Description
Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com
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PS8662A 09/03/04

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